Semiconductor package

A semiconductor package comprising:

• an interposer including a plurality of signal wires and a plurality of ground wires, wherein the plurality of signal wires and the plurality of ground wires are alternately arranged in a first horizontal direction and extend in a second horizontal direction intersecting with the first horizontal direction;
• and
• a first semiconductor chip and a second semiconductor chip on the interposer, wherein the interposer includes first regions under the first semiconductor chip and under the second semiconductor chip and a second region between the first regions and the plurality of signal wires connect the first semiconductor chip and the second semiconductor chip,
• wherein:
• each signal wire among the plurality of signal wires has a first width in the first horizontal direction in the first regions and a second width in the first horizontal direction in the second region,
• the second width is greater than the first width,
• each signal wire is spaced apart by a first distance in the first regions and by a second distance in the second region from an adjacent one of the ground wires among the plurality of ground wires, and
• the second distance is greater than the first distance.

A semiconductor package comprising:

• an interposer including
• a first signal routing layer including a plurality of first signal wires and a plurality of first ground wires, and
• a first ground routing layer including a ground wire structure, and disposed at least one position of upper part and lower part of the first signal routing layer, and
• a first semiconductor chip and a second semiconductor chip on the interposer, wherein the interposer include first regions under the first semiconductor chip and under the second semiconductor chip and a second region between the first regions and the plurality of first signal wires connect the first semiconductor chip and the second semiconductor chip,
• wherein the plurality of first signal wires and the plurality of first ground wires are alternately arranged in a first horizontal direction and extend in a second horizontal direction intersecting the first horizontal direction, and
• wherein each signal wire among the plurality of first signal wires has a first width in the first horizontal direction in the first regions and a second width in the first horizontal direction in the second region, and
• wherein the second width is greater than the first width.