Semiconductor package

A semiconductor package comprising:

• a buffer die;
• a plurality of memory dies on the buffer die;
• a dummy die on the plurality of memory dies;
• and
• a mold layer surrounding the buffer die, the plurality of memory dies, and the dummy die,
• wherein the buffer die comprises:
• a first substrate;
• first upper conductive pads on a top surface of the first substrate;
• first lower conductive pads on a bottom surface of the first substrate;
• and
• a first penetration via penetrating the first substrate,
• wherein at least one of the plurality of memory dies comprises:
• a second substrate;
• second upper conductive pads on a top surface of the second substrate;
• second lower conductive pads on a bottom surface of the second substrate;
• and
• a second penetration via penetrating the second substrate,
• wherein the dummy die comprises:
• a third substrate comprising a trench formed in a top surface of the third substrate, extended in a first direction and a second direction, and having a shape of checkerboard;
• an oxide layer on a bottom surface of the third substrate;
• and
• a heat transfer member filling the trench,
• wherein the dummy die has a thickness ranging from about 55 μm to about 550 μm.

A semiconductor package comprising:

• a package substrate;
• an interposer substrate on the package substrate;
• a first semiconductor chip on the interposer substrate;
• and
• a second semiconductor chip on the interposer substrate,
• wherein the first semiconductor chip comprises:
• a buffer die;
• a plurality of semiconductor dies on the buffer die;
• a dummy die on the plurality of semiconductor dies;
• and
• a mold layer surrounding the buffer die, the plurality of semiconductor dies, and the dummy die,
• wherein the dummy die comprises:
• a dummy substrate comprising a trench formed in a top surface of the dummy substrate, extended in a first direction and a second direction, and having a shape of checkerboard;
• a heat transfer member filling the trench;
• and
• an oxide layer on a bottom surface of the dummy substrate,
• wherein at least one of the plurality of semiconductor dies comprises a substrate,
• wherein a level of a bottom surface of the trench is higher than a level of the bottom surface of the dummy substrate, and
• wherein the bottom surface of the trench is flat.