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US 2025/0149376 A1Published application
High voltage semiconductor device including isolation region
AssigneeDB HiTek Co., Ltd.
InventorSung Hoon LEE
Life of this patent
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Abstract
A high voltage semiconductor device includes an isolation region, in which multiple voids are formed in the isolation region along the vertical direction of the isolation region, so that the possibility of cracks occurring in the isolation region is minimized, and thus tungsten (W), etc. is prevented from penetrating into a space created by the cracks in a subsequent process and deteriorating the breakdown voltage characteristics.
Claims15
A high voltage semiconductor device, comprising:
- a substrate;
- an isolation region disposed in the substrate;
- and
- a void defined in the isolation region,
- wherein the void has a plurality of voids defined in the isolation region.
2 more elements
A high voltage semiconductor device, comprising:
- a substrate;
- a gate electrode disposed on the substrate;
- a drain region disposed in a surface side of the substrate;
- a source region disposed in the surface side of the substrate and spaced apart from the drain region;
- a body region surrounding the source region;
- and
- an isolation region in the substrate and including a plurality of voids therein.
4 more elements
A high voltage semiconductor device, comprising:
- a substrate;
- and
- an isolation region disposed in the substrate and including a plurality of voids in the isolation region,
- wherein the isolation region is formed by:
- forming a width control layer on the substrate;
- forming a trench by alternately performing an anisotropic etching process and an isotropic etching process a predetermined number of times on a basis of a width size controlled by the width control layer;
- and
- gap-filling the trench with an insulating layer a predetermined number of times.
5 more elements
Dependencies are inferred from the claim text.