Semiconductor structure with thermal dissipation layer and method of manufacturing thereof

A method, comprising:

• forming a transistor device on a substrate;
• forming a multi-layer interconnect (MLI) over the transistor device;
• depositing a thermal conductive material on the MLI;
• after the depositing of the thermal conductive material, performing a thermal treatment to the thermal conductive material to increase a thermal conductivity of the thermal conductive material;
• and
• planarizing the thermal conductive material.

An integrated circuit (IC) structure, comprising:

• a transistor device formed on a substrate, the transistor device having source/drain (S/D) regions and a gate structure;
• a multi-layer interconnect (MLI) structure over the transistor device, wherein the MLI structure includes metal lines and metal vias embedded in an intermetal dielectric (IMD) layer;
• and
• a thermal dissipation layer disposed over at least a portion of the MLI structure, wherein a top portion of the thermal dissipation layer has a grain size larger than a bottom portion of the thermal dissipation layer.