Transistor devices having gate-cuts, and fabrication methods thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsSeungchan Yun, Kang-Ill Seo
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Abstract
Transistor devices are provided. A transistor device includes a substrate and a transistor stack on the substrate. The transistor stack includes a lower transistor and an upper transistor that is on top of the lower transistor. Moreover, the transistor device includes a gate-cut on the substrate, adjacent the transistor stack. The gate-cut has a first sloped sidewall and a second sloped sidewall that is opposite the first sloped sidewall. Related methods of forming transistor devices are also provided.
Claims20
A transistor device comprising:
- a substrate;
- a transistor stack on the substrate, wherein the transistor stack comprises a lower transistor and an upper transistor that is on top of the lower transistor;
- and
- a gate-cut on the substrate and adjacent the transistor stack, wherein the gate-cut comprises a first sloped sidewall and a second sloped sidewall that is opposite the first sloped sidewall,
- wherein an upper portion of the second sloped sidewall is adjacent the upper transistor and slopes toward the upper transistor as height increases.
A transistor device comprising:
- a substrate;
- a first transistor stack and a second transistor stack that are spaced apart from each other in a lateral direction on the substrate, wherein the first transistor stack and the second transistor stack each comprise a lower transistor and an upper transistor that is on top of the lower transistor;
- and
- a gate-cut that is between, in the lateral direction, the first transistor stack and the second transistor stack,
- wherein the upper transistor comprises a plurality of semiconductor channel layers,
- wherein the gate-cut extends higher, in a vertical direction, than an uppermost one of the plurality of semiconductor channel layers, and
- wherein the gate-cut comprises a first sidewall that is concave and a second sidewall that is concave or convex.
A method of forming a transistor device, the method comprising:
- forming a polysilicon layer on a plurality of semiconductor channel layers of a transistor;
- forming a gate-cut after forming the polysilicon layer, wherein forming the gate-cut comprises forming an insulating layer on the polysilicon layer, and wherein the polysilicon layer comprises a sacrificial spacer by which the gate-cut is spaced apart from the plurality of semiconductor channel layers;
- and
- forming source/drain regions on sidewalls of the plurality of semiconductor channel layers after forming the gate-cut.
Dependencies are inferred from the claim text.