Memory array programming method using bitlines and memory device for performing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsByeonghoon CHOI, Myeonghee OH, Hyuntaek JUNG, Hanbyul CHOI
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorsByeonghoon CHOI, Myeonghee OH, Hyuntaek JUNG, Hanbyul CHOI
Estimating the term…
A memory device includes a memory cell array including a plurality of memory cells, respectively connected to a plurality of bitlines, a first multiplexer including a plurality of transistors connected to the plurality of bitlines, a reference circuit that generates reference current, a decoding circuit that transmits the reference current to the first multiplexer, and a control logic circuit connected to the reference circuit and the decoding circuit. The control logic circuit controls control the decoding circuit to apply the reference current to transistors, connected to each of at least two bitlines, such that predetermined first current flows through the at least two bitlines.
A memory device comprising:
A memory system comprising:
A method of operating a memory device comprising:
Dependencies are inferred from the claim text.