Write requests with partial translation units
AssigneeMicron Technology, Inc.
InventorAmit Bhardwaj
Life of this patent
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AssigneeMicron Technology, Inc.
InventorAmit Bhardwaj
Estimating the term…
An example system includes a memory device and a processing device, operatively coupled with the memory device. The processing device is configured to perform operations including: determining that a write request references a partially aligned translation unit; identifying a first entry in a translation map, such that the first entry identifies a first physical block of the memory device, such that the first physical block is mapped to the partially aligned translation unit; creating a second entry in the translation map, wherein the second entry identifies a second physical block of the memory device, wherein the second physical block is mapped to the partially aligned translation unit; linking, in the translation map, the first entry and the second entry; and writing a subset of data corresponding to the partially aligned translation unit to a first portion of the second physical block.
A system comprising:
A method comprising:
A non-transitory computer-readable storage medium comprising executable instructions that, when executed by a processing device, cause the processing device to:
Dependencies are inferred from the claim text.