Memory device performing processing in memory and method of performing processing in memory thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsJAEWON PARK, SHINHAENG KANG, KYOMIN SOHN
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Abstract
A memory device includes a memory cell array; and a processing in memory (PIM) unit including a plurality of multiplication and accumulation (MAC) operators which is configured to perform multiply-accumulation operations based on data stored in the memory cell array. The plurality of MAC operators performs the multiply-accumulation operations based on the data in a first stage, and to perform partial sum operations based on result values of the multiply-accumulation operations in a second stage.
Claims20
A memory device comprising:
- a memory cell array;
- and
- a processing in memory (PIM) unit including a plurality of multiplication and accumulation (MAC) operators which is configured to perform multiply-accumulation operations based on data stored in the memory cell array,
- wherein the plurality of MAC operators is configured to perform the multiply-accumulation operations based on the data in a first stage, and to perform partial sum operations based on result values of the multiply-accumulation operations in a second stage.
A method of performing processing in memory of a memory device, the method comprising:
- setting up one or more processing in memory (PIM) instructions;
- loading first data for a PIM operation from a memory cell array of the memory device based on the one or more PIM instructions;
- and
- performing the PIM operation based on the first data,
- wherein the performing the PIM operation includes:
- performing multiply-accumulation operations on the first data through a plurality of MAC operators in a first stage;
- and
- performing partial sum operations based on result values of the multiply-accumulation operations in a second stage when the multiply-accumulation operations are completed.
A memory device comprising:
- a memory cell array;
- control logic configured to control input and output of data to and from, respectively, the memory cell array;
- and
- a plurality of MAC operators configured to perform multiply-accumulation operations based on data stored in the memory cell array responsive to a MAC operation start signal received from the control logic,
- wherein each of the plurality of MAC operators includes:
- a multiplier configured to perform a multiplication operation using a first MAC input and a second MAC input as operands;
- a first multiplexer configured to output a first operation result of the multiplier or a first partial sum input based on a stage information signal;
- a second multiplexer configured to output a second partial sum input or data stored in an accumulation register based on the stage information signal;
- and
- an adder configured to perform an addition operation on a first output of the first multiplexer and a second output of the second multiplexer.
Dependencies are inferred from the claim text.