Semiconductor memory device

A memory system comprising:

• a semiconductor memory device, and
• a memory controller,
• wherein the semiconductor memory device comprises:
• a first pad;
• a second pad;
• a first memory string comprising a plurality of first memory cell transistors connected in series;
• a first bit line connected to one end of the first memory string;
• a first source line connected to the other end of the first memory string;
• a plurality of first word lines connected to gates of the first memory cell transistors, respectively;
• a first sense amplifier connected to the first bit line;
• and
• a first data register connected to the first sense amplifier and configured to store data read from one of the first memory cell transistors, wherein
• when the memory controller sends a first command to the second pad of the semiconductor memory device, the semiconductor memory device outputs the data stored in the first data register toward the memory controller from the first pad, and
• when the memory controller sends a second command to the second pad of the semiconductor memory device, the semiconductor memory device outputs status information toward the memory controller from the second pad.