Heterogeneous chip stacking device

A heterogeneous chip stacking device, comprising:

• a substrate carrying structure;
• a position-limiting substrate structure detachably disposed on the substrate carrying structure;
• a first cover structure detachably disposed above the position-limiting substrate structure;
• a second cover structure detachably disposed on the first cover structure;
• and
• a chip carrying structure movably disposed above the substrate carrying structure;
• wherein the position-limiting substrate structure has a plurality of position-limiting grooves configured to respectively accommodate a plurality of first chips;
• wherein the first cover structure is configured to be disposed on the first chips and press the first chips, and the first cover structure has a plurality of first openings configured to respectively accommodate a plurality of second chips;
• wherein the second cover structure has a plurality of second openings configured to respectively communicate with the first openings, and the second cover structure is configured to allow a part of the chip carrying structure to be accommodated in any one of the second openings;
• wherein the chip carrying structure is configured for sucking the second chip and placing the second chip on a corresponding one of the first chips, so that a plurality of first bonding pad portions of a plurality of first convex pillar structures of the first chip and a plurality of second bonding pad portions of a plurality of second convex pillar structures of the second chip are in direct contact with each other and tightly coupled with each other, respectively.