Thin-film transistor and manufacturing method thereof, array substrate and display device

A manufacturing method of a thin-film transistor, comprising:

• forming a semiconductor layer;
• performing a first time of conductorization process on the semiconductor layer;
• forming an electrode layer;
• performing a second time of conductorization process on the semiconductor layer by using the electrode layer as a mask to form an active layer comprising a channel region as well as a first region and a second region located at two sides of the channel region in a first direction,
• wherein the electrode layer comprises a gate electrode, a first electrode, and a second electrode,
• the first region comprises a first lap region and a first transmission region, an orthographic projection of the first electrode on the active layer overlaps with the first lap region, the first transmission region comprises at least one arc-shaped conductive structure, each of the at least one arc-shaped conductive structure comprises a hollow part and a thinning portion at least partially surrounding the hollow part, a thickness of the thinning portion is smaller than a thickness of the active layer in the channel region,
• one arc-shaped conductive structure is connected to one edge of the first lap region, a size of an orthographic projection of the arc-shaped conductive structure on the edge is smaller than a length of the edge, and the thinning portion is located at a side of the hollow part close to the edge.

A thin-film transistor, comprising:

• an active layer comprising a channel region as well as a first region and a second region located at two sides of the channel region in a first direction;
• and
• an electrode layer comprising a gate electrode, a first electrode and a second electrode,
• wherein the first region comprises a first lap region and a first transmission region, an orthographic projection of the first electrode on the active layer overlaps with the first lap region,
• the first lap region comprises a first edge extending in a second direction, the first edge and an edge of the channel region are disposed opposite to each other at an interval, the first lap region comprises a first doped region and a first functional region, the first functional region is connected to the first edge, and the first doped region is located at two sides of the first functional region in the second direction, respectively.