Anti-doped mos device and voltage reference circuit including same

A method of fabricating an electronic device, the method comprising:

• forming a first nMOS device structure and a second nMOS device structure, each nMOS device structure including a gate oxide disposed on a p-type base material and a gate disposed on the gate oxide;
• performing n-type dopant implantation to form source and drain regions in the p-type substate of the first nMOS device structure and source and drain regions in the p-type substate of the second nMOS device structure and to further dope the gate of the first nMOS device structure n-type whereby a first nMOS device is formed comprising the first nMOS device structure with the gate doped n-type;
• and
• performing p-type dopant implantation to dope the gate of the second nMOS device structure p-type whereby a second nMOS device is formed comprising the second nMOS device structure with the gate anti-doped p-type.