Silicon carbide semiconductor device

A semiconductor device, comprising:

• a semiconductor base that includes a semiconductor substrate of a first conductivity type;
• a plurality of trenches provided at a first main surface of the semiconductor base, the plurality of trenches including a plurality of longitudinal portions that each extend in a first direction;
• a plurality of mesa regions each provided between a corresponding adjacent two of the plurality of longitudinal portions that are adjacent to each other in a second direction orthogonal to the first direction;
• and
• a bottom region of a second conductivity type provided so as to be in contact with a bottom of at least one of the plurality of longitudinal portions, wherein
• each mesa region includes:
• a semiconductor layer of the second conductivity type;
• a plurality of first semiconductor regions of the first conductivity type selectively provided at the first main surface of the semiconductor base so that each of the plurality of first semiconductor region is in contact with a sidewall of at least the one of the plurality of longitudinal portions;
• and
• a plurality of connecting regions of the second conductivity type periodically provided in the semiconductor base aligned in the first direction, the plurality of connecting regions each connecting the semiconductor layer to the bottom region,
• the semiconductor layer includes a plurality of upper portions, periodically provided in the semiconductor base aligned in the first direction to be exposed from the first main surface of the semiconductor base, and
• the plurality of connecting regions each extend in the first direction to an outside of one end and another end of a corresponding one of the plurality of upper portions.

A semiconductor device, comprising:

• a semiconductor base that includes a semiconductor substrate of a first conductivity type;
• a plurality of trenches provided at a first main surface of the semiconductor base, the plurality of trenches including a plurality of longitudinal portions that each extend in a first direction;
• a plurality of mesa regions each provided between a corresponding adjacent two of the plurality of longitudinal portions that are adjacent in a second direction orthogonal to the first direction;
• and
• a plurality of bottom regions of a second conductivity type provided so as to be in contact with bottoms of the plurality of longitudinal portions, respectively, wherein
• each mesa region includes:
• a semiconductor layer of the second conductivity type;
• a first semiconductor region of the first conductivity type selectively provided at the first main surface of the semiconductor base so as to be in contact with a sidewall of one of the corresponding adjacent two of the plurality of longitudinal portions;
• and
• a plurality of connecting regions of the second conductivity type periodically provided in the semiconductor base in the first direction, the plurality of connecting regions connecting the semiconductor layer to corresponding two of the plurality of bottom regions that are respectively in contact with the corresponding adjacent two of the plurality of longitudinal portions that form said mesa region,
• the semiconductor layer includes a plurality of upper portions periodically provided in the semiconductor base in the first direction to be exposed from the first main surface of the semiconductor base, and
• the plurality of connecting regions each extend in the first direction to an outside of one end and another end of a corresponding one of the plurality of upper portions.