Semiconductor device

A semiconductor device comprising:

• an insulating layer comprising a first surface and a second surface;
• an insulating pattern on the first surface of the insulating layer;
• an active pattern on the insulating pattern and comprising a channel pattern;
• a source/drain pattern on at least one side of the active pattern;
• a dummy source/drain pattern extending in at least a portion of the insulating pattern and positioned below the source/drain pattern;
• a lower wiring structure below the second surface of the insulating layer;
• and
• a through-via extending in the insulating layer and connecting the source/drain pattern and the lower wiring structure,
• wherein the insulating pattern comprises:
• a first portion between the insulating layer and the active pattern;
• a second portion surrounding at least a portion of the through-via;
• and
• a fourth portion at least partially surrounding the dummy source/drain pattern.

A semiconductor device comprising:

• an insulating layer comprising:
• a first surface;
• a second surface facing;
• and
• an element isolation trench;
• an insulating pattern on the first surface of the insulating layer;
• an active pattern on the insulating pattern and comprising a channel pattern;
• a source/drain pattern on at least one side of the active pattern;
• a dummy source/drain pattern extending in at least a portion of the insulating pattern and below the source/drain pattern;
• a gate electrode on the insulating pattern and at least partially surrounding the channel pattern;
• a lower wiring structure below the second surface of the insulating layer;
• and
• a through-via extending in the insulating layer and connecting the source/drain pattern and the lower wiring structure,
• wherein the insulating pattern comprises:
• a first portion between the insulating layer and the gate electrodes;
• a second portion surrounding at least a portion of the through-via;
• a third portion on inner walls and bottom surfaces of the element isolation trench;
• and
• a fourth portion at least partially surrounding the dummy source/drain pattern, and
• wherein the through-via comprises:
• a first via portion at least partially surrounded by the second portion of the insulating pattern;
• and
• a second via portion between the first via portion and the lower wiring structure.