US 2025/0098249 A1 · MITIGATING PROXIMITY EFFECTS OF DEEP TRENCH VIAS

Abstract

Disclosed herein are IC structures and devices that aim to mitigate proximity effects of deep trench vias. An example IC structure may include a device region having a first face and a second face, the second face being opposite the first face, and further include a conductive via extending between the first face and the second face, wherein the conductive via includes an electrically conductive material, and wherein a concentration of titanium at sidewalls of the conductive via is below about 1015 atoms per cubic centimeter.

Claims20

Dependent claims

An integrated circuit (IC) structure, comprising:

a transistor comprising a region of a doped semiconductor material, wherein the region is either a source region or a drain region of the transistor;
and
a contact structure coupled to the region, the contact structure comprising an interface material and a fill material, wherein, within the contact structure, the interface material is limited to an area between the region and the fill material.

Dependencies are inferred from the claim text.

Facts

Application

18/467,859Filed 15 Sep 2023

Published

20 Mar 2025

Term ends

Not estimatedThe source records don’t support an estimate.

Classification19 codes

H10D 62/83
Characterised by the materials: being Group IV materials, e.g. B-doped Si or undoped Ge
H10D 64/01
Electrodes of devices having potential barriers: manufacture or treatment
H10D 64/0112
To Group IV semiconductors: using conductive layers comprising silicides
H10D 64/62
Electrodes characterised by their materials: electrodes ohmically coupled to a semiconductor

Mitigating proximity effects of deep trench vias

Life of this patent

Mitigating proximity effects of deep trench vias

Life of this patent

Abstract

Claims20