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US 2025/0098232 A1Published application
Semiconductor device structure and methods of forming the same
OwnerTzu-Ging LINinventor
Life of this patent
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Abstract
Embodiments of present disclosure relates to forming isolation structures in gate structures to prevent current leakage through source/drain regions (EPI), transistors, and silicon substrate. The isolation structures may be formed in the gate structure prior to or after the replacement gate sequence.
Claims20
A semiconductor device, comprising:
- a semiconductor substrate;
- a fin structure on the semiconductor substrate and extending along a first direction;
- a plurality of gate structures across the fin structure along a second direction;
- a plurality of source/drain regions over the fin structure and between the plurality of gate structures;
- a first isolation structure formed in a first gate structure of the plurality of gate structures, wherein the first isolation structure has a first width along the first direction;
- and
- a second isolation structure formed in a second gate structure of the plurality of the gate structures, wherein the second isolation structure has a second width along the first direction, the first gate structure is positioned immediately next to the second gate structure, and the first width is greater than the second width.
4 more elements
A semiconductor device, comprising:
- a semiconductor substrate;
- a plurality of fin structures on the semiconductor substrate and extending along a first direction;
- a gate structure disposed across the plurality of fin structures and extending along a second direction;
- and
- an isolation structure disposed in the gate structure, wherein the isolation structure comprises:
- a first segment having a first width;
- and
- a second segment having a second width, wherein the first width is greater than the second width.
5 more elements
A method comprising:
- forming a plurality of fin structures on a substrate along a first direction;
- forming a plurality of gate structures across the plurality of fin structures;
- depositing a mask layer over the plurality of gate structures;
- forming a pattern in the mask layer, wherein the pattern comprises:
- a first opening in align with a first gate structure of the plurality of gate structures;
- and
- a second opening in align with the second gate structure of the plurality of gate structures, wherein the first gate structures and the second gate structure are immediately next to each other, the first opening has a first width along the first direction, the second opening has a second width along the first direction, and the first width is greater than the second width;
- forming a first isolation opening and a second isolation opening using the pattern in the mask layer;
- and
- depositing a dielectric layer to fill the first isolation opening and the second isolation opening.
7 more elements
Dependencies are inferred from the claim text.