Transistor Gates and Method of Forming

A transistor comprising:

• a first nanostructure over a semiconductor substrate, the first nanostructure extending between a first source/drain region and a second source/drain region;
• a second nanostructure over the first nanostructure, the second nanostructure extending between a first source/drain region and a second source/drain region;
• a gate dielectric surrounding the first nanostructure and the second nanostructure;
• a gate electrode over the gate dielectric and surrounding the first nanostructure and the second nanostructure, wherein the gate electrode comprises:
• a first p-type work function metal around the first nanostructure;
• and
• a barrier material on the first p-type work function metal, the barrier material comprising an internal interface;
• and
• a second p-type work function metal around the second nanostructure, wherein the barrier material separates the first p-type work function metal from the second p-type work function metal;
• a first inner spacer separating the gate electrode from the first source/drain region;
• and
• a second inner spacer separating the gate electrode from the second source/drain region.

A device comprising:

• a gate dielectric around a first nanostructure and a second nanostructure, the first nanostructure is disposed over the second nanostructure;
• a p-type work function metal over the gate dielectric, wherein a first portion of the p-type work function metal is separated from a second portion of the p-type work function metal in a region between the first nanostructure and the second nanostructure;
• and
• a barrier material in the region between the first nanostructure and the second nanostructure, wherein a first portion of the barrier material and a second portion of the barrier material meet at a seam disposed in the region between the first nanostructure and the second nanostructure.