Gate-all-around field effect transistor structures

Abstract

A field effect transistor (FET) structure and method for making the same is disclosed. In an aspect, a FET structure comprises a gate structure, disposed between a first vertical source/drain (S/D) structure and a second vertical S/D structure, the gate structure comprising a channel structure comprising a plurality of vertically-stacked, horizontal channels connecting the first vertical S/D structure to the second vertical S/D structure horizontally through a vertical metal gate structure that at least partially surrounds the plurality of horizontal channels. The FET also comprises a backside inter-layer dielectric (ILD) layer disposed below the vertical metal gate structure, wherein a first thickness of the vertical metal gate structure below a bottom channel of the plurality of horizontal channels is larger than a second thickness of the vertical metal gate structure between adjacent channels of the plurality of horizontal channels.

Dependencies are inferred from the claim text.