Nanosheet device with aligned isolation and epitaxial growth

A semiconductor device comprising:

• a stack of nanostructure material layers overlying a substrate, wherein a gate all around structure is present on a channel region portion for the stack of nanostructure material layers;
• source and drain semiconductor contacts on each side of the gate all around structure, the source and drain semiconductor contacts in direct contact with edges of the channel region portion for the stack of nanostructure material layers;
• a composite gate spacer on the gate all around structure, wherein the composite gate spacer including a confining portion on sidewalls of the source and drain semiconductor contacts;
• and
• an electrically insulating substrate isolation layer aligned to be between the gate all around structure, the composite gate spacer and the substrate, wherein a base portion of the composite gate spacer has an L-shaped geometry including a portion that warps over an upper surface of the electrically insulating substrate Isolation layer.

A semiconductor device comprising:

• a stack of nanostructure material layers overlying a substrate, wherein a gate all around structure is present on a channel region portion for the stack of nanostructure material layers;
• source and drain semiconductor contacts on each side of the gate all around structure, the source and drain semiconductor contacts in direct contact with edges of the channel region portion for the stack of nanostructure material layers;
• a gate spacer on the gate all around structure, wherein a composite gate spacer including a confining portion on sidewalls of the source and drain contacts;
• and
• an electrically insulating substrate isolation layer having a first thickness aligned to be between the gate all around structure, the gate spacer and the substrate and a second thickness present between the source and drain semiconductor contacts and the substrate, wherein a base portion of the gate spacer has an L-shaped geometry including a portion that warps over an upper surface of a portion of the electrically insulating substrate isolation layer having the first thickness.