Semiconductor device

A semiconductor device comprising:

• lower electrodes on a substrate;
• a support pattern between the lower electrodes;
• an upper electrode on the lower electrodes and the support pattern;
• a dielectric layer between the lower electrodes and the upper electrode, and between the support pattern and the upper electrode;
• and
• a mask insulating pattern on the upper electrode opposite the lower electrodes and the support pattern,
• wherein the upper electrode comprises:
• a first portion on upper surfaces of the lower electrodes;
• and
• a second portion on a sidewall of the support pattern, and
• wherein the mask insulating pattern is thinner than the first portion.

A semiconductor device, comprising:

• active regions defined on a substrate by a device isolation layer, the active regions respectively comprising a first impurity region and a second impurity region;
• word lines on the active regions and extending in a first direction;
• capping insulating patterns on top surfaces of the word lines, respectively;
• bit lines on the word lines and extending in a second direction intersecting the first direction;
• contact plugs between the bit lines and electrically connected to the second impurity region;
• and
• a capacitor on the contact plugs,
• wherein the capacitor comprises:
• lower electrodes on the substrate;
• a support pattern between the lower electrodes;
• an upper electrode on the lower electrodes and the support pattern;
• and
• a dielectric layer between the lower electrodes and the upper electrode, and between the support pattern and the upper electrode,
• wherein the upper electrode comprises:
• a first portion on upper surfaces of the lower electrodes;
• and
• a second portion on a sidewall of the support pattern, and
• wherein the first portion is thicker than the second portion.