Semiconductor devices including capacitors

A semiconductor device, comprising:

• a lower structure including a conductive region disposed on a substrate;
• a capacitor electrically connected to the conductive region of the lower structure, wherein the capacitor includes first electrode structures, a at least one support layer between the first electrode structures, a dielectric layer covering the first electrode structures and the at least one support layer, and a second electrode structure on the dielectric layer;
• a plate layer covering the capacitor;
• a polishing stop layer covering a side surface of the plate layer;
• a lower interlayer insulating layer covering the polishing stop layer;
• an upper interlayer insulating layer on the lower interlayer insulating layer and the plate layer;
• and
• a cell contact plug penetrating through the upper interlayer insulating layer and the plate layer and directly contacting the second electrode structure,
• wherein the plate layer is disposed on the second electrode structure,
• wherein a side surface of the cell contact plug is in direct contact with the plate layer, and
• wherein, in a plan view, the polishing stop layer surrounds the plate layer.

A semiconductor device, comprising:

• a lower structure including a conductive region;
• a capacitor electrically connected to the conductive region of the lower structure, wherein the capacitor includes first electrode structures, at least one support layer between the first electrode structures, a dielectric layer covering the first electrode structures and the at least one support layer, and a second electrode structure on the dielectric layer;
• a plate layer covering the capacitor;
• a polishing stop layer covering a side surface of the plate layer;
• a lower interlayer insulating layer covering the polishing stop layer;
• and
• an upper interlayer insulating layer on the lower interlayer insulating layer and the plate layer,
• wherein an upper surface of the plate layer is in direct contact with an upper interlayer insulating layer,
• wherein the polishing stop layer includes a lower portion extending in a horizontal direction, an intermediate portion extending vertically from one end of the lower portion, and an upper portion disposed on the intermediate portion,
• wherein the plate layer is disposed on the second electrode structure,
• wherein a thickness of the upper portion decreases as a level of the upper portion increases, and
• wherein the intermediate portion directly contacts the lower interlayer insulating layer, and the upper portion directly contacts the upper interlayer insulating layer.