Gate bias circuit for a driver monolithically integrated with a gan power fet

An electronic device, comprising:

• a GaN power FET;
• a GaN driver coupled to the GaN power FET;
• and
• a gate bias circuit, the gate bias circuit including:
• a linear regulator for outputting a VHI voltage, wherein the VHI voltage is coupled to the GaN driver,
• a first GaN resistor having one end coupled to a ground supply terminal and another end coupled to one end of a second GaN resistor, and
• another end of the second GaN resistor coupled to a cathode of a GaN diode and to one end of a bypass capacitor,
• wherein another end of the bypass capacitor is coupled to the ground supply terminal,
• wherein an anode of the GaN diode is coupled to the linear regulator, and
• wherein a voltage VREG at the other end of the second GaN resistor is coupled to the GaN driver.