Apparatuses and methods for duty cycle adjustment
AssigneeLodestar Licensing Group LLC
InventorYantao Ma
Life of this patent
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Abstract
Apparatuses, duty cycle adjustment circuits, adjustment circuits, and methods for duty cycle adjustment are disclosed herein. An example duty cycle adjustment circuit may be configured to receive a signal and adjust a duty cycle of the signal a first amount using a coarse adjustment. The duty cycle adjustment circuit may further be configured, after adjusting the duty cycle of the signal a first amount, to adjust the duty cycle of the signal a second amount different from the first amount using a fine adjustment to provide a duty cycle adjusted signal.
Claims20
A dynamic random access memory (DRAM) device comprising:
- a duty cycle adjustment circuit, when enabled by a control signal provided by a memory controller, configured to:
- receive a signal,
- receive a first adjustment value to adjust a duty cycle of the signal by a first adjustment amount, and
- receive a second adjustment value to adjust the duty cycle of the signal by a second adjustment amount, wherein the second adjustment amount is less than the first adjustment amount.
A method, comprising:
- receiving an enable signal from a memory controller at a duty cycle adjustment circuit of a dynamic random access memory (DRAM);
- enabling the duty cycle adjustment circuit of the DRAM responsive to the enable signal;
- receiving a signal at a duty cycle adjustor of the duty cycle adjustment circuit;
- applying a first adjustment to the duty cycle of the signal based on a respective first adjustment value;
- and
- applying a second adjustment of the duty cycle of the signal based on a respective second adjustment value, wherein the second adjustment value is less than the first adjustment value.
Dependencies are inferred from the claim text.