Cascode power amplification circuits, including protection voltage circuits

A power amplification circuit comprising:

• an amplifier circuit comprising a plurality of cascode transistors coupled in a series between an output node and a reference voltage node, the series comprising a first cascode transistor coupled to the output node;
• a stress control circuit comprising a variable capacitor and a fixed capacitor coupled in series between the output node and the reference voltage node and configured to increase a bias voltage on the first cascode transistor in response to the output voltage exceeding a threshold;
• and
• a protection circuit comprising:
• a voltage-to-current circuit that generates an output current on a comparison node based on the output voltage;
• and
• a threshold current circuit coupled to the comparison node and configured to conduct a threshold current from the comparison node based on the threshold;
• wherein:
• a control terminal of the first cascode transistor is coupled to a node between the variable capacitor and the fixed capacitor;
• and
• the protection circuit generates the feedback signal to the bias circuit in response to the output current to the comparison node exceeding the threshold current.

A power amplification circuit comprising:

• an amplifier circuit comprising a plurality of cascode transistors coupled in a series between an output node and a reference voltage node, the series comprising a first cascode transistor coupled to the output node and a last cascode transistor coupled to the reference voltage node, the last cascode transistor determining a current in the output node;
• a protection circuit configured to generate a feedback signal in response to an output voltage on the output node exceeding a first threshold, the protection circuit comprising:
• a voltage-to-current circuit that generates an output current on a comparison node based on the output voltage;
• and
• a threshold current circuit coupled to the comparison node and configured to conduct a threshold current from the comparison node based on the threshold;
• a bias circuit configured to reduce a bias voltage on the last cascode transistor based on the feedback signal;
• and
• a stress control circuit comprising a variable capacitor and a fixed capacitor coupled in series between the output node and the reference voltage node and increasing a bias voltage on the first cascode transistor in response to the output voltage exceeding a second threshold;
• wherein:
• a control terminal of the first cascode transistor is coupled to a node between the variable capacitor and the fixed capacitor;
• and
• the protection circuit generates the feedback signal to the bias circuit in response to the output current to the comparison node exceeding the threshold current.