Reactive power sharing method for parallel inverters based on virtual impedance and dynamic droop coefficient

A reactive power sharing method for parallel inverters based on virtual impedance and a dynamic droop coefficient, comprising the following steps:

• S1. establishing Thevenin equivalent models of parallel VSGs for parallel inverters, and analyzing the power allocation characteristics of the parallel VSGs to obtain a coupling relationship between active power and reactive power;
• S2. collecting an a-phase feeder impedance current value Iai, a b-phase feeder impedance current value Ibi, a c-phase feeder impedance current value Ici, an a-phase filter capacitance voltage value Ucai, a b-phase filter capacitance voltage value Ucbi and a c-phase filter capacitance voltage value Ucci of an LC inverter, obtaining d-axis component feeder impedance current idi, q-axis component feeder impedance current iqi, d-axis component filter capacitance voltage Ucdi and q-axis component filter capacitance voltage Ucqi under dq0 coordinate system after Park transformation, constructing virtual impedance by a line impedance observer through the d-axis component feeder impedance current idi, the q-axis component feeder impedance current iqi, the d-axis component filter capacitance voltage Ucdi and the q-axis component filter capacitance voltage Ucqi and according to the coupling relationship between the active power and the reactive power, to achieve power decoupling, and calculating VSG active power Pi and VSG reactive power Qi, wherein i=1, 2;
• S3. obtaining a voltage reference value Eabci from the VSG reactive power Qi, obtaining a d-axis voltage reference value U*cdi and a q-axis voltage reference value U*cqi under the dq0 coordinate system through Park transformation of the voltage reference value Eabci, and using the d-axis voltage reference value U*cdi and the q-axis voltage reference value U*cqi as voltage outer loop reference values of voltage and current double closed loops;
• S4. constructing a dynamic droop coefficient by the VSG reactive power Qi, and adjusting the d-axis voltage reference value U*cdi and the q-axis voltage reference value U*cqi adaptively by virtual impedance and the dynamic droop coefficient to obtain the adjusted d-axis VSG output voltage reference value Urefcdi and q-axis VSG output voltage reference value Urefcqi;
• S5. subtracting the d-axis VSG output voltage reference value Urefcdi, and the q-axis VSG output voltage reference value Urefcqi, as well as the d-axis component filter capacitance voltage Ucdi and the q-axis component filter capacitance voltage Ucqi in a voltage outer ring to obtain a capacitance voltage d-axis error value ΔUcdi and a capacitance voltage q-axis error value ΔUcqi;
• obtaining a feeder impedance current d-axis reference value i*di and a feeder impedance current q-axis reference value i*qi value under the dq0 coordinate system from the capacitance voltage d-axis error value ΔUcdi and the capacitance voltage q-axis error value ΔUcqi by a PI controller;
• subtracting the feeder impedance current d-axis reference value i*di and the feeder impedance current q-axis reference value i*qi, as well as the d-axis component feeder impedance current idi and the q-axis component feeder impedance current iqi to obtain a feeder impedance current d-axis error value Δidi and a feeder impedance current q-axis error value Δiqi;
• obtaining d-axis modulation wave voltage Umd and q-axis modulating wave voltage Umq from the feeder impedance current d-axis error value Δidi and the feeder impedance current q-axis error value Δiqi by the PI controller;
• and then conducting Park inverse transformation to obtain three-phase modulation wave voltage Umabc.