Semiconductor package

A semiconductor package comprising:

• a wiring structure;
• a first chip stack structure on the wiring structure and including a plurality of first semiconductor chips, the plurality of first semiconductor chips being offset with each other, the first chip stack structure being oblique along a first direction such that the plurality of first semiconductor chips are inclined with respect to the wiring structure;
• a first sealing material encapsulating the first chip stack structure;
• a second chip stack structure on the first chip stack structure and including a plurality of second semiconductor chips being offset with each other, and the second chip stack structure being oblique along a second direction forming an angle with the first direction;
• and
• a second sealing material encapsulating the second chip stack structure,
• wherein each of the plurality of first semiconductor chips includes,
• first connection pads on one end portion thereof and electrically connected to the wiring structure, and
• second connection pads on another end portion thereof, the one end portion and the another end portion of each of the plurality of first semiconductor chips being opposite to each other, and
• each of the plurality of second semiconductor chips includes third connection pads on one end portion thereof and electrically connected to the second connection pad.

A semiconductor package comprising:

• a first semiconductor package;
• and
• a second semiconductor package on the first semiconductor package,
• wherein the first semiconductor package includes,
• a wiring structure,
• a chip stack structure including a plurality of first semiconductor chips being offset with each other, the chip stack structure being oblique on the wiring structure such that the plurality of first semiconductor chips are inclined with respect to the wiring structure, and
• a sealing material encapsulating the chip stack structure,
• each of the plurality of first semiconductor chips includes,
• first connection pads being on one end portion thereof and electrically connected to the wiring structure, and
• second connection pads being on another end portion of first semiconductor chip and electrically connected to the second semiconductor package, and
• the second semiconductor package includes a plurality of second semiconductor chips.