Semiconductor structure and manufacturing method therefor

A manufacturing method for a semiconductor structure, comprising:

• providing an interposer;
• forming an initial deep trench capacitor array structure in the interposer, the initial deep trench capacitor array structure comprising a plurality of initial deep trench capacitor structures;
• performing a first etching on the initial deep trench capacitor array structure to expose a first electrode layer on a periphery of an initial deep trench capacitor structure on an outmost edge side of the initial deep trench capacitor array structure, to form an intermediate deep trench capacitor array structure;
• performing a second etching on the intermediate deep trench capacitor array structure to etch a side that is of the first electrode layer being exposed and that is away from the initial deep trench capacitor structure on the outmost edge side to form an isolation trench, and cut off adjacent capacitor cells in the intermediate deep trench capacitor array structure to form a deep trench capacitor array;
• and
• filling an isolation material in the isolation trench to form an isolation structure, the isolation structure at least partially surrounding a deep trench capacitor on an outmost edge side of the deep trench capacitor array.