Generation of physically unclonable function using one-time-programmable memory devices with back-end-of-line transistors

A memory system, comprising:

• a memory array comprising a plurality of anti-fuse memory cells formed on a frontside of a substrate, each of the memory cells presenting a logic state of either a first logic state or a second logic state and at least comprising:
• a first programming transistor formed in a first one of a plurality of metallization layers disposed over the frontside, and gated by a first programming word line;
• and
• a first reading transistor formed in a second one of the plurality of metallization layers disposed over the frontside or along a major surface on the frontside, coupled to the first programming transistor and a first bit line, and gated by a first reading word line;
• and
• an authentication circuit operatively coupled to the memory array and configured to generate a bit of a Physically Unclonable Function (PUF) signature for each of the plurality of memory cells based on the logic state thereof.

A method of fabricating a semiconductor device, comprising:

• forming a first reading transistor along a major surface on a frontside of a substrate;
• forming a first one of a plurality of metallization layers disposed over the first reading transistor to connect a gate of the first reading transistor to a first reading word line and to connect the first reading transistor to a first bit line;
• forming a second one of the plurality of metallization layers over the first one of the plurality of metallization layers;
• forming a first programming transistor in the second one of the plurality of metallization layers;
• and
• forming a third one of the plurality of metallization layers over the first one of the plurality of metallization layers to connect a gate of the first programming transistor to a first programming word line and to connect the first programming transistor to the first reading transistor.