Photolithography method and structures thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHao Chu Liao, Wei Tse Hsu, Chen-Yen Kao
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a substrate having a plurality of chip regions. In some embodiments, the semiconductor device further includes a plurality of scribe lines interposing the plurality of chip regions. In some examples, the semiconductor device further includes a first plurality of alignment mark regions distributed within the plurality of scribe lines. In some embodiments, the semiconductor device further includes a second plurality of alignment mark regions distributed within each of the plurality of chip regions.
Claims20
A semiconductor device, comprising:
- a substrate including a plurality of chip regions;
- a plurality of scribe lines interposing the plurality of chip regions;
- a first plurality of alignment mark regions distributed within the plurality of scribe lines;
- and
- a second plurality of alignment mark regions distributed within each of the plurality of chip regions.
An integrated circuit (IC) manufacturing system, comprising:
- a lithography system configured to form a pattern on a substrate that includes a plurality of chip regions, wherein the pattern includes a plurality of alignment mark regions distributed within each of the plurality of chip regions and within scribe lines that interpose the plurality of chip regions;
- one or more metrology tools configured to inspect the pattern to provide overlay data;
- and
- a lithography correction system coupled to receive the overlay data from the one or more metrology tools;
- wherein the lithography correction system is configured to make one or more adjustments to the lithography system based on the received overlay data.
A method, comprising:
- on a substrate including a plurality of chip regions, forming a first plurality of alignment marks within the each of the plurality of chip regions and a second plurality of alignment marks within scribe lines interposing the plurality of chip regions;
- determining an offset distance from overlay data corresponding to the first and second plurality of alignment marks;
- based on the determined offset distance, providing adjustments to a lithography system;
- and
- after providing the adjustments to the lithography system, performing a photolithography process to pattern a target feature on the substrate.
Dependencies are inferred from the claim text.