Semiconductor wafer fabrication with polyimide to graphene conversion

A method for forming a graphene interconnect structure, comprising:

• forming a first conductive layer over a first dielectric layer;
• forming a second dielectric layer over the first conductive layer;
• forming a via etch opening in the second dielectric layer which exposes at least a portion of the first conductive layer;
• forming a wiring line etch opening in an upper portion of the second dielectric layer having a portion which overlaps with the via etch opening;
• forming polyimide to fill the via etch opening and the wiring line etch opening in the second dielectric layer;
• and
• applying irradiation from a laser source to directly convert the polyimide into the graphene interconnect structure comprising a graphene wiring line formed in the wiring line etch opening and a graphene via structure formed in the via etch opening to directly, electrically connect the graphene wiring line to the first conductive layer.

An integrated circuit, comprising:

• a substrate comprising one or more semiconductor devices formed therein;
• and
• a multi-layer interconnect stack formed over the substrate comprising a plurality of stacked wiring lines that are vertically separated from one another by a corresponding plurality of interlayer dielectric (ILD) layers, the multi-layer interconnect stack comprising:
• a first graphene wiring line in a first conductor layer,
• a second graphene wiring line in a second conductor layer that is separated from the first graphene wiring line by a first ILD layer, and
• a first graphene via structure formed in the first ILD layer to electrically connect the first graphene wiring line to the second graphene wiring line;
• where the first graphene wiring line, second graphene wiring line, and first graphene via structure each comprise an irradiation-induced graphene structure which does not include an underlying metal layer.