Backside offset gate contact for backside spacing

A semiconductor structure, comprising:

• a first gate;
• a first source/drain (S/D) adjacent to the first gate, and connected to a back-end-of-line (BEOL) through a S/D contact directly above the first S/D;
• and
• an offset gate contact electrically connected between the first gate and a first level signal line, wherein the offset gate contact is located directly below the first S/D.

A semiconductor structure, comprising:

• a first gate comprising a high-k metal gate (HKMG) configured to activate nanosheet channels;
• a gate extension extending vertically from the HKMG;
• and
• an offset gate contact laterally adjacent to the gate extension.