Dynamic step voltage level adjustment
AssigneeMicron Technology, Inc.
InventorsCarmine Miccoli, Andrew Bicksler
Life of this patent
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Abstract
Processing logic in a memory device receives a request to execute a programming operation on a set of memory cells of the memory device. A first set of programming pulses corresponding to a first step voltage level are caused to be applied to program the set of memory cells. The processing logic determines that a programming voltage level associated with a programming pulse of the first set of one or more programming pulses satisfies a condition. The first set voltage is adjusted to a second step voltage level in response to the condition being satisfied.
Claims20
A memory device comprising:
- a memory array comprising a set of memory cells;
- and
- processing logic, operatively coupled with the memory array, to perform operations comprising:
- causing a first set of one or more programming pulses corresponding to a first step voltage level to be applied to program the set of memory cells;
- determining that a programming voltage level associated with a programming pulse of the first set of one or more programming pulses satisfies a condition, wherein the condition is satisfied when the programming voltage level is greater than or equal to a programming voltage threshold level;
- and
- adjusting the first step voltage level to a second step voltage level in response to the condition being satisfied.
A memory device comprising:
- a memory array comprising a set of memory cells;
- and
- processing logic, operatively coupled with the memory array, to perform operations comprising:
- causing a first set of one or more programming pulses corresponding to a first step voltage level to be applied to program the set of memory cells;
- determining that a first programming voltage level associated with a first programming pulse of the first set of one or more programming pulses satisfies a condition, wherein the condition is satisfied when the first programming voltage level is greater than or equal to a first programming voltage threshold level;
- and
- adjusting a first pulse duration associated with the first programming pulse to a second pulse duration in response to the condition being satisfied.
A memory device comprising:
- a memory array comprising a set of memory cells;
- and
- processing logic, operatively coupled with the memory array, to perform operations comprising:
- causing a first programming pulse of a first set of one or more programming pulses corresponding to a first step voltage level to be applied to program the set of memory cells;
- determining that a first programming voltage level associated with the first programming pulse of the first set of one or more programming pulses satisfies a condition, wherein the condition is satisfied when the first programming voltage level is greater than or equal to a first programming voltage threshold level;
- adjusting the first step voltage level to a second step voltage level in response to the condition being satisfied;
- and
- causing a second programming pulse of a second set of one or more programming pulses corresponding to the second step voltage level to be applied to program the set of memory cells.
Dependencies are inferred from the claim text.