Memory device and operation method thereof, memory system, and storage medium

A memory system, comprising:

• one or more memory devices, each of the memory devices comprising:
• a memory cell array comprising a plurality of blocks, each of the blocks comprising a plurality of memory cells and a plurality of word lines coupled to the plurality of memory cells;
• and
• a peripheral circuit coupled to the memory cell array and configured to:
• when performing a first read operation on memory cells coupled to a selected word line, apply a first pass voltage to a first word line, apply a second pass voltage to a second word line, and apply a third pass voltage to a third word line,
• wherein the first word line comprises at least one word line physically located above and below the selected word line respectively, both the second word line and the third word line comprise word lines physically located on a side of the first word line away from the selected word line, memory cells coupled to the second word line comprise programmed memory cells, memory cells coupled to the third word line comprise unprogrammed memory cells, and the first pass voltage, the second pass voltage and the third pass voltage are all different;
• and
• a memory controller coupled to the memory devices and configured to control the memory devices.

An operation method of a memory device, comprising:

• when performing a first read operation on memory cells coupled to a selected word line, applying a first pass voltage to a first word line, applying a second pass voltage to a second word line, and applying a third pass voltage to a third word line,
• wherein the first word line comprises at least one word line physically located above and below the selected word line respectively, both the second word line and the third word line comprise word lines physically located on a side of the first word line away from the selected word line, memory cells coupled to the second word line comprise programmed memory cells, memory cells coupled to the third word line comprise unprogrammed memory cells, and the first pass voltage, the second pass voltage and the third pass voltage are all different, and
• the memory device comprises:
• a memory cell array comprising a plurality of blocks, each of the blocks comprising a plurality of memory cells and a plurality of word lines coupled to the plurality of memory cells;
• and
• a peripheral circuit coupled to the memory cell array.