Integrated circuit including ternary content addressable memory cell

An integrated circuit comprising:

• a ternary content-addressable memory (TCAM) cell on a front side of a substrate, the TCAM cell including a first cell storing a first value, a second cell storing a second value, and a comparison circuit connected with the first cell and the second cell;
• a backside via extending through the substrate in a vertical direction with respect to the substrate;
• a backside wiring layer on a back side of the substrate, the backside wiring layer including a match line connected with the comparison circuit through the backside via;
• and
• a frontside wiring layer above the TCAM cell in the vertical direction, the frontside wiring layer including a bit line connected with the first cell and the second cell, a complementary bit line connected with the first cell and the second cell, and at least one frontside power rail configured to transmit a supply voltage to the TCAM cell.

An integrated circuit comprising:

• a ternary content-addressable memory (TCAM) cell on a front side of a substrate, the TCAM cell including a first cell storing a first value, a second cell storing a second value, and a comparison circuit connected with the first cell and the second cell;
• a backside via extending through the substrate in a vertical direction with respect to the substrate;
• a backside wiring layer on a back side of the substrate, the backside wiring layer including at least one word line connected with the first cell and the second cell through the backside via;
• and
• a frontside wiring layer above the TCAM cell in the vertical direction, the frontside wiring layer including a bit line connected with the first cell and the second cell, a complementary bit line connected with the first cell and the second cell, and at least one frontside power rail configured to transmit a supply voltage to the TCAM cell.