Memory cell array circuit and method of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-I SU, Chung-Cheng CHOU, Yu-Der CHIH, Zheng-Jun LIN
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-I SU, Chung-Cheng CHOU, Yu-Der CHIH, Zheng-Jun LIN
Estimating the term…
A method of operating a memory circuit includes generating, by a first memory cell array, a first current in response to a first voltage, generating, by a tracking circuit, a second set of leakage currents, generating, by a first current source, a second write current, and mirroring, by a first current mirror. The first current includes a first set of leakage currents and a first write current. The first current is in a first path with a second current in a second path. The second current includes the second set of leakage currents and the second write current. The first write current corresponds to the second write current. The first set of leakage currents corresponds to the second set of leakage currents. The second set of leakage currents is configured to track the first set of leakage currents of the first memory cell array.
A method of operating a memory circuit, the method comprising:
A method of operating a memory circuit, the method comprising:
A method of operating a memory circuit, the method comprising:
Dependencies are inferred from the claim text.