Computing apparatus and robustness processing method therefor

A computing apparatus, comprising:

• a first computing module, a second computing module, a third computing module and an in-memory computing module,
• wherein the in-memory computing module comprises at least one processing unit and an optimization unit, the at least one processing unit comprises a first processing unit, the first processing unit comprises a first computing memristor array, and the first computing memristor array comprises a plurality of memristor devices arranged in an array;
• the first computing module is configured to, based on model parameters of a target algorithm model, obtain a mapping relationship between the model parameters and the first computing memristor array, and based on an influence factor that determines a critical weight device, determine a way to obtain a weight criticality of the plurality of memristor devices from the influence factor;
• the second computing module is configured to, obtain an input set of the algorithm model, and determine a criticality value for each of the plurality of memristor devices according to the way;
• the third computing module is configured to determine a critical weight device among the plurality of memristor devices according to the criticality value for each of the plurality of memristor devices;
• the optimization unit is configured to perform optimization processing on the first processing unit based on the critical weight device.

A computing apparatus, comprising:

• a first computing sub-apparatus and an in-memory computing module,
• wherein the in-memory computing module comprises at least one processing unit and an optimization unit, the at least one processing unit comprises a first processing unit, the first processing unit comprises a first computing memristor array, and the first computing memristor array comprises a plurality of memristor devices arranged in an array;
• the first computing sub-apparatus comprises:
• a processor and a memory, wherein the memory stores a computer executable program, and the computer executable program, when executed by the processor, is configured to implement the following method:
• based on model parameters of a target algorithm model, obtaining a mapping relationship between the model parameters and the first computing memristor array;
• based on an influence factor that determines a critical weight device, determining a way to obtain a weight criticality of the plurality of memristor devices from the influence factor;
• obtaining an input set of the algorithm model, and determine a criticality value for each of the plurality of memristor devices according to the way;
• determining a critical weight device among the plurality of memristor devices according to the criticality value for each of the plurality of memristor devices;
• and
• based on the critical weight device, providing an instruction for performing optimization processing on the first processing unit;
• wherein the optimization unit is configured to, based on the critical weight device, perform an optimization processing on the first processing unit according to the instruction.