Back to results
US 2025/0095708 A1Published application
Apparatuses and methods for operations in a self-refresh state
AssigneeLodestar Licensing Group LLC
InventorsPerry V. Lea, Glen E. Hush
Life of this patent
Estimating the term…
Abstract
The present disclosure includes apparatuses and methods for performing operations by a memory device in a self-refresh state. An example includes an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to direct performance of compute operations on data stored in the array when the array is in a self-refresh state.
Claims20
A device, comprising:
- a plurality of banks of memory cells;
- and
- at least one compute component coupled with the plurality of banks of memory cells, the at least one compute component configured to:
- retrieve, from a register of the device, instructions for one or more logical operations to be executed on a set of operands, the register comprising an instruction buffer for the instructions that are associated with an operating mode of the device, wherein the instructions are retrieved based at least in part on the operating mode;
- and
- manage execution of the instructions for the one or more logical operations on the set of operands in accordance with the operating mode and without enabling an input/output (I/O) line associated with a host.
3 more elements
A method, comprising:
- retrieving, from a register of a device, instructions for one or more logical operations to be executed on a set of operands, the register comprising an instruction buffer for the instructions that are associated with an operating mode of the device, wherein the instructions are retrieved based at least in part on the operating mode;
- and
- managing execution of the instructions for the one or more logical operations on the set of operands in accordance with the operating mode and without enabling an input/output (I/O) line associated with a host.
A memory system, comprising:
- a host;
- one or more banks of memory cells;
- and
- one or more compute components coupled with the one or more banks of memory cells, the one or more compute components configured to:
- retrieve, from a first register, instructions for one or more logical operations to be executed on a set of operands, the first register comprising an instruction buffer for the instructions that are associated with a first operating mode, wherein the instructions are retrieved based at least in part on the first operating mode;
- and
- manage execution of the instructions for the one or more logical operations on the set of operands in accordance with the first operating mode and without enabling an input/output (I/O) line associated with the host.
4 more elements
Dependencies are inferred from the claim text.