Neuromorphic computing circuit and method for control
AssigneeFujitsu Limited
InventorShigeyuki TAKANO
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AssigneeFujitsu Limited
InventorShigeyuki TAKANO
Estimating the term…
A neuromorphic computing circuit includes nodes including first and second nodes generating a spike including a counter for a spike existing time and a sender information, and a transmission array including transmission circuits, one or more of which is on the transmission path and forwards the spike. Each transmission circuit updates a counter value when forwarding the spike and sets, when detecting meeting of a first spike from the first to the second node and a second spike from the second to the first node, time difference based on the counter values, into the first spike. The second node includes a generation circuit specifying time difference equal or less than a first threshold among ones in the received spikes, accumulating connection strengths between the sender of third spikes set the specified differences therein and the second node, and generating a fourth spike when the accumulating result exceeds a second threshold.
A neuromorphic computing circuit comprising:
A method for controlling a neuromorphic computing circuit comprising a plurality of nodes that includes a first node and a second node, and a transmission array that connects the plurality of nodes to one another, the method comprising:
Dependencies are inferred from the claim text.