Analog ECO Flow
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAyushi Agrawal, Yu-Tao Yang, Ming-Cheng Syu, Wen-Shen Chou, Yung-Chow Peng
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAyushi Agrawal, Yu-Tao Yang, Ming-Cheng Syu, Wen-Shen Chou, Yung-Chow Peng
Estimating the term…
Methods of designing integrated circuits incorporating an analog ECO flow are provided. An example method comprises receiving an initial design and performing an auto-marker process. The auto-marker process comprises performing a first auto-marker process to surround a first plurality of active cells of the design with first computer-aided design (CAD) layers corresponding to a first plurality of engineering change order (ECO) cells, performing an enhanced auto-marker process to cover irregular shapes of the design with second CAD layers corresponding to a second plurality of ECO cells, and performing a second auto-marker process to fill empty areas of the design with third CAD layers corresponding to a third plurality of ECO cells. The method further includes filling the design with the first plurality of ECO cells, the second plurality of ECO cells, and the third plurality of ECO cells.
A method of designing an integrated circuit comprising:
A non-transitory computer-readable medium encoded with memory storing instructions for fabricating an integrated circuit, which when executed result in operations comprising:
A computer-implemented system for making a design change to an integrated circuit, comprising:
Dependencies are inferred from the claim text.