Expanded kernel generation

A processor, comprising:

• a memory circuit that stores a set of data values that correspond to an array, wherein the array comprises a kernel of weights;
• a shifter circuit that receives the array as a sequence of the set of data values and produces a set of permuted sequences based on coupling data values from one or more inputs to one or more outputs in a different order, wherein respective data values of the set of data values are coupled to the shifter circuit via the one or more inputs, and wherein the set of permuted sequences correspond to an expanded kernel;
• and
• a multiplier circuit operatively coupled to the one or more outputs of the shifter circuit and comprising first registers and second registers, the multiplier circuit loads, into the first registers, sequences produced on the one or more outputs of the shifter circuit, and loads, into the second registers, input data values, and, based on the sequences and the input data values, the multiplier circuit generates, in parallel, a plurality of convolution results.