Algorithmic tcam based ternary lookup

Integrated circuit for use in performing packet forwarding-related operations related to incoming packet data, the integrated circuit being configurable to use machine-readable ternary content addressable memory (TCAM) to store, at least in part, table data for use in association with the packet forwarding-related operations, the integrated circuit comprising:

• processing hardware to execute compiler-produced program instructions, the compiler-produced program instructions, when executed by the processing hardware resulting in the integrated circuit being configured to perform the packet forwarding-related operations, the packet forwarding-related operations being configurable to comprise:
• performing ternary memory table lookup to determine multiple entries in the table data that match, at least in part, at least one portion of the incoming packet data;
• selecting, based upon relative priorities associated with the multiple entries, one of the multiple entries that corresponds to a highest one of the relative priorities;
• and
• based upon the one of the multiple entries, determining at least one action to be executed in relation to the incoming packet data;
• wherein:
• the table data is configurable to comprise multiple portions;
• at least one of the multiple portions of the table data is configurable to indicate, at least in part, relative priority data in association with table key data, the relative priority data indicating the relative priorities;
• at least one other of the multiple portions of the table data is configurable to comprise the multiple entries;
• and
• the table data is configurable to indicate one or more packet processing rules that comprise the at least one action.

Machine-readable instructions to be executed by an integrated circuit, the integrated circuit for use in performing packet forwarding-related operations related to incoming packet data, the integrated circuit being configurable to use machine-readable ternary content addressable memory (TCAM) to store, at least in part, table data for use in association with the packet forwarding-related operations, the integrated circuit comprising processing hardware, the instructions, when executed by the integrated circuit, resulting in the integrated circuit being configured for performance of certain operations comprising:

• storing, at least in part, in the machine-readable TCAM, the table data;
• and
• executing, by the processing hardware, compiler-produced program instructions, the compiler-produced program instructions, when executed by the processing hardware resulting in the integrated circuit being configured to perform the packet forwarding-related operations, the packet forwarding-related operations being configurable to comprise:
• performing parallel table lookup operations to determine multiple entries in the table data that match, at least in part, at least one portion of the incoming packet data;
• selecting, based upon relative priorities associated with the multiple entries, one of the multiple entries that corresponds to a highest one of the relative priorities;
• and
• based upon the one of the multiple entries, determining at least one action to be executed in relation to the incoming packet data;
• wherein:
• the table data is configurable to comprise multiple table data partitions;
• at least one of the multiple table data partitions is configurable to indicate, at least in part, the relative priorities in association with table indices that are associated with the at least one portion of the incoming packet data;
• at least one other of the multiple table data partitions is configurable to comprise the multiple entries;
• and
• the table data is configurable to indicate one or more packet processing rules that comprise the at least one action.

Machine-readable instructions to be executed by an integrated circuit, the integrated circuit for use in performing packet forwarding-related operations related to incoming packet data, the integrated circuit being configurable to use machine-readable ternary content addressable memory (TCAM) to store, at least in part, table data for use in association with the packet forwarding-related operations, the integrated circuit comprising processing hardware, the instructions, when executed by the integrated circuit, resulting in the integrated circuit being configured for performance of certain operations comprising:

• storing, at least in part, in the machine-readable TCAM, the table data;
• and
• executing, by the processing hardware, compiler-produced program instructions, the compiler-produced program instructions, when executed by the processing hardware resulting in the integrated circuit being configured to perform the packet forwarding-related operations, the packet forwarding-related operations being configurable to comprise:
• performing ternary memory table lookup to determine multiple entries in the table data that match, at least in part, at least one portion of the incoming packet data;
• selecting, based upon relative priorities associated with the multiple entries, one of the multiple entries that corresponds to a highest one of the relative priorities;
• and
• based upon the one of the multiple entries, determining at least one action to be executed in relation to the incoming packet data;
• wherein:
• the table data is configurable to comprise multiple portions;
• at least one of the multiple portions of the table data is configurable to indicate, at least in part, relative priority data in association with table key data, the relative priority data indicating the relative priorities;
• at least one other of the multiple portions of the table data is configurable to comprise the multiple entries;
• and
• the table data is configurable to indicate one or more packet processing rules that comprise the at least one action.

A network switch for performing packet forwarding-related operations related to a network and incoming packet data to be received via the network, the network switch being configurable to use machine-readable ternary content addressable memory (TCAM) in association with the packet forwarding-related operations, the network switch comprising:

• ports to be coupled to the network;
• and
• an integrated circuit coupled to the ports, the integrated circuit comprising:
• processing hardware to execute compiler-produced program instructions, the compiler-produced program instructions, when executed by the processing hardware resulting in the integrated circuit being configured to perform the packet forwarding-related operations, the packet forwarding-related operations being configurable to comprise:
• performing parallel table lookup operations to determine multiple entries in the table data that match, at least in part, at least one portion of the incoming packet data;
• selecting, based upon relative priorities associated with the multiple entries, one of the multiple entries that corresponds to a highest one of the relative priorities;
• and
• based upon the one of the multiple entries, determining at least one action to be executed in relation to the incoming packet data;
• wherein:
• the table data is configurable to comprise multiple table data partitions;
• at least one of the multiple table data partitions is configurable to indicate, at least in part, the relative priorities in association with table indices that are associated with the at least one portion of the incoming packet data;
• at least one other of the multiple table data partitions is configurable to comprise the multiple entries;
• and
• the table data is configurable to indicate one or more packet processing rules that comprise the at least one action.