Smart factory reset procedure

A memory system, comprising:

• one or more memory arrays;
• and
• processing circuitry coupled with the one or more memory arrays and configured to cause the memory system to:
• receive one or more commands;
• update, based at least in part on the one or more commands, one or more mapping tables of a set of mapping tables associated with the one or more memory arrays, the one or more mapping tables each associated with a hierarchical level of two or more different hierarchical levels and comprising a correspondence between a set of logical addresses and a set of physical addresses of the one or more memory arrays;
• transfer data from a portion of the one or more memory arrays storing the data to another portion of the one or more memory arrays;
• and
• perform an erase operation on a subset of physical addresses of the set of physical addresses, the subset of physical addresses corresponding at least to the portion of the one or more memory arrays.

A memory system, comprising:

• one or more memory arrays;
• processing circuitry coupled with the one or more memory arrays;
• and
• a set of mapping tables associated with the one or more memory arrays and comprising a correspondence between a set of logical addresses and a set of physical addresses of the one or more memory arrays, the set of mapping tables comprising at least:
• a first mapping table associated with a first hierarchical level;
• and
• a subset of second mapping tables corresponding to the first mapping table, the subset of second mapping tables associated with a second hierarchical level lower than the first hierarchical level, wherein each second mapping table of the subset of second mapping tables comprises a correspondence between a respective subset of a set of logical addresses and a respective subset of a set of physical addresses of the one or more memory arrays, the set of logical addresses and the set of physical addresses associated with the first mapping table.

A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of a memory system, cause the memory system to:

• receive one or more commands;
• update, based at least in part on the one or more commands, one or more mapping tables of a set of mapping tables associated with one or more memory arrays, the one or more mapping tables each associated with a hierarchical level of two or more different hierarchical levels and comprising a correspondence between a set of logical addresses and a set of physical addresses of the one or more memory arrays;
• transfer data from a portion of the one or more memory arrays storing the data to another portion of the one or more memory arrays;
• and
• perform an erase operation on a subset of physical addresses of the set of physical addresses, the subset of physical addresses corresponding at least to the portion of the one or more memory arrays.