Autonomously managing core cluster frequencies using performance statistics in processor devices

A processor device, comprising:

• means for collecting a plurality of Activity Management Unit (AMU) statistics from a plurality of AMUs, corresponding to a plurality of processor cores of a core cluster of the processor device, for each frequency operating point of one or more frequency operating points over a time interval;
• means for generating, based on the plurality of AMU statistics, a performance model representing processor performance as a function of frequency;
• means for generating, based on the performance model and a power consumption measurement, an energy-per-instruction (EI) model representing energy per instruction as a function of frequency;
• means for generating an advantage model based on a first rate of change of the performance model as a function of frequency and a second rate of change of the EI model as a function of frequency;
• means for identifying a target frequency operating point based on the advantage model;
• and
• means for transmitting the target frequency operating point to a dynamic voltage and frequency scaling (DVFS) circuit of the processor device.

A method for autonomously managing core cluster frequencies in processor-based devices, comprising:

• collecting, by a cluster power management circuit of a processor device, a plurality of Activity Management Units (AMU) statistics from a plurality of AMUs, corresponding to a plurality of processor cores of a core cluster of the processor device, for each frequency operating point of one or more frequency operating points over a time interval;
• generating, by the cluster power management circuit based on the plurality of AMU statistics, a performance model representing processor performance as a function of frequency;
• generating, by the cluster power management circuit based on the performance model and a power consumption measurement, an energy-per-instruction (EI) model representing energy per instruction as a function of frequency;
• generating, by the cluster power management circuit, an advantage model based on a first rate of change of the performance model as a function of frequency and a second rate of change of the EI model as a function of frequency;
• identifying, by the cluster power management circuit, a target frequency operating point based on the advantage model;
• and
• transmitting, by the cluster power management circuit, the target frequency operating point to a dynamic voltage and frequency scaling (DVFS) circuit of the processor device.

A non-transitory computer-readable medium, having stored thereon computer-executable instructions that, when executed, cause a processor device of a processor-based device to:

• collect a plurality of Activity Management Units (AMU) statistics from a plurality of AMUs, corresponding to a plurality of processor cores of a core cluster of the processor device, for each frequency operating point of one or more frequency operating points over a time interval;
• generate, based on the plurality of AMU statistics, a performance model representing processor performance as a function of frequency;
• generate, based on the performance model and a power consumption measurement, an energy-per-instruction (EI) model representing energy per instruction as a function of frequency;
• generate an advantage model based on a first rate of change of the performance model as a function of frequency and a second rate of change of the EI model as a function of frequency;
• identify a target frequency operating point based on the advantage model;
• and
• transmit the target frequency operating point to a dynamic voltage and frequency scaling (DVFS) circuit of the processor device.