Buffer circuit for capacitive loads
AssigneeSemiconductor Components Industries, LLC
InventorsShiva Shanthan VELURI, Anirudh OBEROI
Life of this patent
Estimating the term…
Abstract
A reference buffer circuit for buffering a reference voltage is disclosed. The reference buffer circuit includes an input circuit that may generate a replica of the reference voltage. A feedback circuit may generate a charging current using a current mirror circuit and a bias current. A value of the charging current may be greater than a value of the bias current. The feedback circuit may provide a buffered version of the reference voltage at a reference node using the charging current and the replica voltage. An output stage circuit may sink a compensation current from the reference node.
Claims20
An apparatus, comprising:
- an input circuit configured to generate a replica voltage using a reference voltage, wherein the replica voltage is offset from the reference voltage;
- a feedback circuit configured to:
- generate a bias current;
- generate a charging current using the bias current, wherein a value of the charging current is greater than a value of the bias current;
- and
- provide a buffered reference voltage at a reference node using the charging current and the replica voltage;
- and
- an output stage circuit configured to sink, based on the buffered reference voltage, a compensation current from the reference node.
A method, comprising:
- receiving, by a buffer circuit, a reference voltage;
- generating, by the buffer circuit, a replica voltage using the reference voltage, wherein the replica voltage is offset from the reference voltage;
- generating, by the buffer circuit, a bias current;
- generating, by the buffer circuit, a charging current using the bias current, wherein the charging current is greater than the bias current;
- and
- providing, by the buffer circuit, a buffered reference voltage at a reference node using the charging current and the replica voltage.
A system, comprising:
- an image sensor circuit coupled to a reference node;
- and
- a reference buffer circuit configured to:
- receive a reference voltage;
- generate a bias current;
- generate a charging current using the bias current;
- and
- provide a buffered reference voltage at the reference node based on the reference voltage and using the charging current.
Dependencies are inferred from the claim text.