Multi-Chain Measurement Circuit

An apparatus, comprising:

• a measurement circuit, wherein the measurement circuit includes:
• a first delay circuit that includes a first set of serially-connected buffer circuits, wherein the first set of serially-connected buffer circuits is configured to propagate an input signal;
• a second delay circuit connected in parallel with the first delay circuit, wherein the second delay circuit includes a second set of serially-connected buffer circuits configured to propagate the input signal;
• and
• a set of storage circuits, wherein a first storage circuit of the set of storage circuits includes a first true input coupled to a first input of a first buffer circuit of the first set of serially-connected buffer circuits and a first complementary signal coupled to a first output of a second buffer circuit of the second set of serially connected buffer circuits.

A method, comprising:

• providing an input signal to a first delay circuit having a first plurality of serially-connected buffer circuits and a second delay circuit having a second plurality of serially-connected buffer circuits;
• propagating, in the first plurality of serially-connected buffer circuits, a first signal that is based on the input signal;
• propagating, in the second plurality of serially-connected buffer circuits, a second signal that is based on the input signal;
• providing, during a first cycle of operation, a vernier clock signal to a first set of storage circuits that are associated with the first delay circuit and to a second set of storage circuits that are associated with the second delay circuit;
• capturing, during the first cycle of operation in ones of the first set of storage circuits and in the second set of storage circuits and in response to a transition of the vernier clock signal, first logic values produced by the first and second pluralities of serially-connected buffer circuits;
• and
• outputting a first digital value from the first set of storage circuits, wherein the first digital value is indicative of a total number of the first and second pluralities of serially-connected buffer circuits through which the input signal had propagated at a time of the transition of the vernier clock signal.