Performance-based cache adjustment
AssigneeQUALCOMM Incorporated
InventorsKarunakar Reddy BASIREDDY, George PATSILARAS, Vivekanandan NAVEEN
Life of this patent
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Abstract
A device includes a system cache accessible to a central processing unit (CPU) sub-system. The system cache includes a CPU portion allocated to the CPU sub-system. The device also includes a cache allocation governor that is configured to obtain a performance metric associated with at least one of the system cache or the CPU sub-system. The cache allocation governor is also configured to, based on the performance metric satisfying a cache adjustment criterion, adjust a size of the CPU portion.
Claims30
A device comprising:
- a system cache accessible to a central processing unit (CPU) sub-system, the system cache including a CPU portion allocated to the CPU sub-system;
- and
- a cache allocation governor configured to:
- obtain a performance metric associated with at least one of the system cache or the CPU sub-system;
- and
- based on the performance metric satisfying a cache adjustment criterion, adjust a size of the CPU portion.
A method comprising:
- obtaining, at a device, a performance metric associated with at least one of a system cache or a central processing unit (CPU) sub-system of the device;
- and
- based on determining that the performance metric satisfies a cache adjustment criterion, adjusting a size of a CPU portion in the system cache, wherein the CPU portion is allocated to the CPU sub-system.
A non-transitory computer-readable medium storing instructions that, when executed by one or more processors, cause the one or more processors to:
- obtain a performance metric associated with at least one of a system cache or a central processing unit (CPU) sub-system;
- and
- based on determining that the performance metric satisfies a cache adjustment criterion, adjust a size of a CPU portion in the system cache, wherein the CPU portion is allocated to the CPU sub-system.
An apparatus comprising:
- means for obtaining a performance metric associated with at least one of a system cache or a central processing unit (CPU) sub-system;
- and
- means for adjusting a size of a CPU portion in the system cache, the size adjusted based on determining that the performance metric satisfies a cache adjustment criterion, wherein the CPU portion is allocated to the CPU sub-system.
Dependencies are inferred from the claim text.