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US 2025/0086058 A1Published application
Read calibration by sector of memory
AssigneeMicron Technology, Inc.
InventorsPriya Venkataraman, Pitamber Shukla, Vipul Patel, Scott A. Stoller
Life of this patent
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Abstract
Read calibration by sector of memory can include reading a page of memory, having more than one sector, with a read level, such as a default read level. In response to an error, such as an uncorrectable error correction code read result, the respective read level can be calibrated for each sector to yield a respective calibrated read level per sector. The page of memory can be read with the respective calibrated read level per sector. The calibrated read levels can be stored.
Claims20
A method, comprising:
- reading a physical page of memory with a read level, wherein the physical page of memory is divided into a plurality of physical sectors from left to right along the physical page of memory prior to operation of the physical page of memory;
- receiving an uncorrectable error correction code (UECC) read result;
- calibrating the read level for each of the plurality of physical sectors of memory in response to the UECC read result to yield a respective calibrated read level per physical sector;
- and
- reading the physical page of memory with the respective calibrated read level per physical sector.
2 more elements
A method, comprising:
- reading a physical page of memory with a respective read level for each of a plurality of data states to which memory cells are programmed, wherein the physical page of memory is divided into a plurality of physical sectors from left to right along the physical page of memory prior to operation of the physical page of memory;
- receiving an uncorrectable error correction code (UECC) read result;
- calibrating each of the respective read levels on a per physical sector and per data state basis in response to the UECC read result to yield a respective calibrated read level per data state per physical sector;
- and
- reading the physical page of memory with the respective calibrated read level per data state per physical sector.
2 more elements
An apparatus, comprising:
- an array of memory cells including a physical page of memory is divided into a plurality of physical sectors from left to right along the physical page of memory prior to operation of the physical page of memory;
- control circuitry coupled to the array, wherein the control circuitry is configured to cause:
- the physical page of memory to be read with a read level;
- the read level for each of the plurality of physical sectors of memory to be calibrated in response to receipt of an uncorrectable error correction code (UECC) read result to yield a respective calibrated read level per physical sector;
- and
- the physical page of memory to be read with the respective calibrated read level per physical sector.
3 more elements
An apparatus, comprising:
- an array of memory cells including a physical page of memory is divided into a plurality of physical sectors from left to right along the physical page of memory prior to operation of the physical page of memory;
- control circuitry coupled to the array, wherein the control circuitry is configured to cause:
- the physical page of memory to be read with a respective read level for each of a plurality of data states to which memory cells are programmed;
- each of the respective read levels to be calibrated on a per physical sector and per data state basis, in response to receipt of an uncorrectable error correction code (UECC) read result to yield a respective calibrated read level per data state per physical sector;
- and
- the physical page of memory to be read with the respective calibrated read level per data state per physical sector.
3 more elements
Dependencies are inferred from the claim text.