Memory device and method for monitoring the performances of a memory device
AssigneeLodestar Licensing Group LLC
InventorsAlberto Troia, Antonino Mondello
Life of this patent
Estimating the term…
Abstract
The present disclosure relates to method for checking the reading phase of a non-volatile memory device including at least an array of memory cells and with associated decoding and sensing circuitry and a memory controller, the method comprises: storing in a dummy row associated to said memory block at least internal block variables and a known pattern; performing a reading of said dummy row; I comparing a result of the reading with the known pattern; trimming the parameters of the reading and/or swapping the used memory block based on the result of the comparing.
Claims20
A non-volatile memory device including an array of memory cells with associated decoding and sensing circuitry and a memory controller, wherein the memory array comprises:
- a plurality of sub-arrays;
- a first plurality of first memory blocks in each sub-array;
- and
- a dummy row for each first memory block for storing internal block variables of a reading phase and a known pattern, wherein the memory controller is configured to:
- updating content of the dummy row, for a portion of a second plurality of memory blocks comprising a second memory block, in response to the second portion being subject to same environmental variation conditions as the first memory block;
- and
- trimming parameters of the reading based on the updated content.
A system, comprising:
- a host device;
- a non-volatile memory device coupled to the host device and comprising at least an array of memory cells with associated decoding and sensing circuitry and a memory controller,
- a plurality of sub-arrays in the memory array;
- a plurality of memory blocks in each sub-array;
- and
- a dummy row for each memory block for storing internal block variables of a reading phase and a known pattern, wherein the first dummy row of a first memory block is provided in a plurality of different memory blocks of a first one of the plurality of subarrays, and wherein the memory controller is configured to:
- update content of a first dummy row periodically;
- and
- update the content, for a portion of the plurality of different memory blocks, in response to the portion being subject to same environmental variation conditions as the first memory block.
A method for checking the status of a non-volatile memory device including an array of memory cells including memory blocks and with associated decoding and sensing circuitry and a memory controller, the method comprising:
- storing, in a dummy row, internal block variables and a known pattern;
- performing a reading of the dummy row;
- comparing the result of the reading with the known pattern;
- and
- trimming parameters of the reading set for a next erase operation based at least in part on a result of the comparing and on drift information of the known pattern.
Dependencies are inferred from the claim text.