Memory devices and methods for protecting the same

A memory device, comprising:

• an array of memory cells, including a plurality of word lines;
• a controller configured to refresh at least one of the plurality of word lines during a first refresh cycle in response to a refresh signal;
• a random number generator configured to generate a first number;
• a counter electrically coupled to the random number generator and configured to receive the first number as an initial value of the counter, wherein the counter is configured to be turned on in response to the refresh signal;
• and
• an address register electrically coupled to the counter and configured to store an address of a first word line being active when the counter decrements to zero,
• wherein the controller is configured to access the address register to obtain the address of the first word line and protect a second word line during a second refresh cycle, wherein an address of the second word line is adjacent to the address of the first word line.