Integrated hardware-in-the-loop (hil) system for testing hardware devices and a method thereof

A method of testing hardware devices using an integrated Hardware-In-the-Loop (HIL) system, the method comprising:

• receiving, by a microcontroller unit of the integrated HIL system, test parameters required for testing a Device Under Test (DUT) through a front panel of the integrated HIL system;
• decoding, by the microcontroller unit, the test parameters for determining a test functionality to be performed on the DUT;
• performing, by the microcontroller unit, the test functionality on the DUT using one of a plurality of hardware abstraction layers, comprised in an automated test application interface of the microcontroller unit, and generate a test outcome corresponding to the test functionality;
• and
• output, by the microcontroller unit, the test outcome on a display interface of the front panel.

A non-transitory computer-readable medium storing computer-executable instructions for testing hardware devices using an integrated Hardware-In-the-Loop (HIL) system, comprising:

• receiving test parameters required for testing a Device Under Test (DUT) through a front panel of the integrated HIL system;
• decoding the test parameters for determining a test functionality to be performed on the DUT;
• performing the test functionality on the DUT using one of a plurality of hardware abstraction layers, comprised in an automated test application interface of the microcontroller unit, and generate a test outcome corresponding to the test functionality;
• and
• outputting the test outcome on a display interface of the front panel.